T Flip-Flop
CODE
library IEEE;
use IEEE STD_LOGIC_1164.all;
entity TFF is
port(t, clk, rst :in STD_LOGIC;
qb:out STD_LOGIC);
end TFF;
architecture Behavioral of TFF is
signal temp:std_logic;
begin
process(t,clk)
begin
if (clk'event and clk='1' )then
if t='0'then
temp<=temp;
elsif t='1'then
temp<=not(temp);
end if;
end if;
end process;
qb<=temp;
end Behavioral;
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