SR Flip_Flop

 

 SR Flip-Flop 

CODE 

library IEEE;
use IEEE STD_LOGIC_1164.all;

entity SRFF is
    port(s, r, clk, rst :in STD_LOGIC;
            q, qb:out STD_LOGIC);
end SRFF;

architecture Behavioral of SRFF is
begin
    process(s,r,clk,rst)
    begin
        if rst='1' then
            q<='0';
            qb<='0';
            elsif clk'event and clk='1' then
            if(s/=r) then
                q<=s;
                qb<=r;

            elsif(s='1' and r='1') then

            q<='z';

            qb<='z';     
        end if;
        end if;
        end process;
end Behavioral;