D Flip-Flop
CODE
library IEEE;
use IEEE STD_LOGIC_1164.all;
entity DFF is
port(D, clk, rst :in STD_LOGIC;
y:out STD_LOGIC);
end DFF;
architecture Behavioral of DFF is
begin
process(D,clk,rst)
begin
if rst='1' then
y<='0';
elsif clk'event and clk='1' then
y<=D;
end if;
end process;
end Behavioral;
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