Power Optimization

Power Optimization 

 

QUE::Explain power optimization technique.

QUE::Explain power distribution ad power optimization technique.

• Power optimization is the use of electronic design automatic tools to optimize(Reduced) the power consumption.

• It reduced power consumption of isolated gate logic.

• The most effective way to reduce it's power consumption is to make it changes it's output as few time possible.

• If there is no change in output value the gate is not required.

• The logic circuit to reduce the no. of unnecessary changes to gates output can be design 

 

Glitches and power:

 

•  To eliminate the glitching the method for power for power reduction can be used.

• Glitch reduction may be used in sequential system.